Reporting Issues
Bug 3015 - Support 5 level paging for mInternalCr3
Summary: Support 5 level paging for mInternalCr3
Status: RESOLVED FIXED
Alias: None
Product: EDK2
Classification: Unclassified
Component: Code (show other bugs)
Version: Current
Hardware: All All
: Lowest normal
Assignee: Sheng Wei
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2020-10-20 01:28 UTC by Sheng Wei
Modified: 2020-12-01 20:45 UTC (History)
3 users (show)

See Also:
EDK II Code First industry standard specifications: ---
Branch URL:
Release(s) the issue is observed: EDK II Master
The OS the target platform is running: ---
Package: UefiCpuPkg
Release(s) the issues must be fixed: EDK II Master
Tianocore documents:


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Description Sheng Wei 2020-10-20 01:28:08 UTC
When use mInternalCr3, GetPageTableEntry() get the 5 level paging state by hardware Cr4.Bits.LA57. But it should use the paging level state when create mInternalCr3.
Comment 1 gaoliming 2020-10-27 21:57:57 UTC
Wei is working on it.
Comment 2 Sheng Wei 2020-11-02 23:18:21 UTC
If mInternalCr3 is non zero, it will use the page table from mInternalCr3.
And it will use mInternalIs5LevelPaging to reflect the page table type.
If use page table from CR3, reflect the page table type by CR4 LA57 bit.

PiCpuSmmEntry() will generate the page table of SMM shack memory.
If CET feature is enabled, it also includes the SMM shadows shack memory.
And we need to set some attributes on SMM shadows shack memory
 in PiCpuSmmEntry() when CET feature is enabled.
Since the page table of SMM shack memory is used in SMI entry, and it does not
 set to CR3 in PiCpuSmmEntry(). We use mInternalCr3 as page table root
 when PiCpuSmmEntry() calls ConvertMemoryPageAttributes(). We need to use
 mInternalIs5LevelPaging determining whether 5-level paging is enabled or not.
If mInternalCr3 is zero, ConvertMemoryPageAttributes() will use the page table
 in CR3, and refects the page table type by CR4 LA57 bit.

It is a bug fix when enable CET feature with 5 level paging.
https://bugzilla.tianocore.org/show_bug.cgi?id=1521
https://bugzilla.tianocore.org/show_bug.cgi?id=1946